LTC4274
13
4274fd
PIN FUNCTIONS
the power dissipation in the external MOSFET by reduc-
ing the current limit threshold when the drain-to-source
voltage exceeds 10V. The Power Good bit is set when the
voltage from OUT to V
EE
drops below 2.4V (typ). A 500k
resistor is connected internally from OUT to AGND when
the port is idle.
V
EE
: Main Supply Input. Connect to a 45V to 57V
supply, relative to AGND.
AUTO: AUTO Pin Mode Input. AUTO pin mode allows the
LTC4274 to detect and power up a PD even if there is no
host controller present on the I
2
C bus. The voltage of the
AUTO pin determines the state of the internal registers
when the LTC4274 is reset or comes out of V
DD
UVLO
(see the LTC4274 Software Programming documenta-
tion). The states of these register bits can subsequently
be changed via the I
2
C interface. The real-time state of the
AUTO pin is read at bit 0 in the Pin Status register (11h).
Internally pulled down to DGND. Must be tied locally to
either V
DD
or DGND.
MSD: Maskable Shutdown Input. Active low. When pulled
low, all ports that have their corresponding mask bit set
in the Misc Config register (17h) will be reset, equivalent
to pulling the SHDN pin low. Internal filtering of the MSD
pin prevents glitches less than 1約 wide from resetting
ports. Internally pulled up to V
DD
.
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